Entries by becbrek

Breker Verification Systems Expands Integration With Synopsys Verification Solution

SAN JOSE, CA — May 25, 2016 — Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company, today announced that it has enhanced the integration of its portable stimulus products with the verification solution and flow from Synopsys, Inc. The portable, self-checking test cases generated by Breker’s Trek™ family are verified in simulation testbenches using […]

Agnisys and Breker Partner to Generate System-Level Portable Stimulus Sequences

LOWELL, MA and SAN JOSE, CA — May 24, 2016 — and Breker Verification Systems, Inc., today announced availability of an integrated solution for portable test sequences where sequences from the same description are generated for use across all verification platforms, from early-stage simulation to full-chip validation of silicon in the bring-up lab. ISequenceSpec™ from […]

Semifore and Breker Partner to Deliver Seamless, Automated Portable Stimulus Flow

SAN JOSE, CA — May 23, 2016 — Semifore, Inc., the leading developer of tools for the automation of the implementation of the hardware-software interface for ASIC, SoC and FPGA-based designs, and Breker Verification Systems, Inc., the System-on-Chip (SoC) Verification Company, today announced an integration of their solutions for SoC design and verification engineers. Immediately […]

Media Alert: Breker Verification Systems to Discuss Silicon Verification of 144-Processor Multi-SoC Cavium Design and Exhibit at DVCon

SAN JOSE, CA — February 24, 2016 — WHO: Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company WHAT: Will co-present a technical paper with Cavium, Inc. during the Design and Verification Conference and Exhibition (DVCon) in Silicon Valley. The presentation on “Using Portable Stimulus to Verify Cache Coherency in a Many-Core SoC” will discuss […]

Cadence, Mentor Graphics and Breker Announce Collaborative Technology Contribution to Accellera Portable Stimulus Working Group

SAN JOSE, Calif., Sept. 8, 2015 — Cadence Design Systems, Inc., Mentor Graphics Corporation, and Breker Verification Systems today announced that the three companies have collaborated on a technology contribution to the Accellera Portable Stimulus Working Group. The contribution leverages the combined experience of the three companies in providing portable test and stimulus solutions, and […]

Media Alert: Breker Verification Systems to Demonstrate Industry’s First Portable Stimulus Solution at DAC in San Francisco

SAN JOSE, CA — Jun 4, 2015 — WHO: Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company WHAT: Will exhibit in Booth 3209 during the Design Automation Conference (DAC) in San Francisco. Breker will show how its Trek family of products provides a robust, proven solution to the challenge of portable stimulus for SoC […]

Media Alert: Breker Verification Systems to Exhibit Cache Coherency TrekApp Verification Software at DVCon

SAN JOSE, CA — Feb 27, 2015 — WHO: Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company WHAT: Will exhibit in Booth 905 during the Design and Verification Conference and Exhibition (DVCon) in Silicon Valley. Breker will show how its self-contained Cache Coherency TrekApp can automatically generate portable, self-verifying, multi-threaded test cases to stress […]

Media Alert: Breker Verification Systems to Exhibit TrekUVM and TrekSoC Verification Software at ARM TechCon

SAN JOSE, CA — Sep 30, 2014 — WHO: Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company WHAT: Will exhibit in Booth 170 during ARM TechCon in Silicon Valley. Breker will show how automatic generation of portable, self-verifying, multi-threaded test cases accelerate chip development schedules while improving design quality through more thorough functional verification.

Media Alert: Breker Verification Systems to Present in Two Tutorials, Exhibit TrekUVM and TrekSoC Verification Software at DVCon India

SAN JOSE, CA — Sep 23, 2014 — WHO: Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company WHAT: Will exhibit in Booth 12 during the first Design and Verification Conference and Exhibition (DVCon) in India. Breker will show how chip development schedules can be accelerated while improving design quality through more effective functional verification.

Media Alert: Breker Verification Systems to Demonstrate TrekSoC SoC Verification Software, Synopsys’ Verdi Advanced Debug Solution Link at Design Automation Conference

SAN JOSE, CA — May 28, 2014 — WHO: Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company WHAT: Will exhibit in Booth #2602 during the 51st Design Automation Conference (DAC). It will demonstrate a link between TrekSoC™, SoC verification software that automatically generates multi-threaded, self-verifying C test cases to run on an SoC’s multiple […]