Next month will see a significant milestone for Portable Stimulus. On September 15th the review period for the Early Adopter release of the Accellera Portable Stimulus Standard (PSS) will close and with it the opportunity to make your voice heard. This is an exciting time for Breker, the market leader in this space for the past decade, and signals a time when the industry can transition from a technology only available to a few aggressive adopters, to making it available to the mainstream.
The semiconductor design industry has always preferred evolution over revolution. There have been a few successful revolutions but most of the time revolution happens over time through evolutionary steps.
Many people today would probably point to the migration to RTL from schematics as being revolutionary and they are probably right in hindsight. But revolution is not what really happened and it is not how Synopsys became the company that dominated the field of RTL synthesis.
When people think about design languages, they may not realize that the language is almost irrelevant. The language supports the underlying semantic model and it is this model that is important. EDA has defined design models at the gate level, the register transfer level (RTL) and various forms of behavioral levels. When we talk about RTL, we think about Verilog and VHDL, but they are only the languages that support that model, or very minor variations of it. But what about verification?
https://brekersystems.com/wp-content/uploads/2018/02/breker-logo4.png00Adnan Hamidhttps://brekersystems.com/wp-content/uploads/2018/02/breker-logo4.pngAdnan Hamid2017-04-04 00:00:522020-02-06 02:37:01Portable Stimulus – The First Verification Model
The creation of the Portable Stimulus standard has raised a number of issues about the tradeoffs between using an industry standard language and a domain-specific language. Several blogs have tried to make the case for one or the other and often use scare tactics to make one look better than the other. That is not the objective of this blog. Instead, it’s meant to provide some information as to why the inclusion of the C++ variant is a good thing for the industry.
https://brekersystems.com/wp-content/uploads/2018/02/breker-logo4.png00Adnan Hamidhttps://brekersystems.com/wp-content/uploads/2018/02/breker-logo4.pngAdnan Hamid2017-03-22 00:00:582020-02-06 02:46:51Total Value of a Standard
At the recent DVCon, I had the pleasure to moderate a panel that enabled users to talk about their experiences working with the Accellera standard’s body during the creation of the Portable Stimulus standard. I would like to thank Accellera for enabling such a panel and to Nanette Collins for organizing the panel and making sure that I had the easiest role in the ensuing discussion. I am sure that full write-ups of the panel will emerge, but I wanted to make the voice of the users heard.
https://brekersystems.com/wp-content/uploads/2018/02/breker-logo4.png00Adnan Hamidhttps://brekersystems.com/wp-content/uploads/2018/02/breker-logo4.pngAdnan Hamid2017-03-17 00:00:552020-02-06 02:43:07Users Talk Back on Portable Stimulus
When DVCon opens next week, attendees will hear plenty of talk about Portable Stimulus, a methodology and technology that’s grabbing industry attention and gaining momentum with the design verification community. In fact, I predict it will be the buzz of the conference this year.
Using a novel graph-based approach, Portable Stimulus is a standard means to specify verification intent and behaviors reusable across target platforms. Think of it as the GPS system for the verification flow –– Graph-based to ensure comprehensible complex scenarios, Portable, eliminating test redundancy across platforms, and Shareable to foster communication and reuse.
In the movies, when a person acts irrationally they are usually declared to be mad and quickly placed in a straitjacket for the protection of themselves and those around them. If we continue those thoughts into the world of verification, SystemVerilog must be declared to be a mad language.
Why is Accellera supporting the use of an industry standard language in the development of the Portable Stimulus Standard?
Many of you remember the wave of anticipation when SystemC was created. A new language at a higher level of abstraction compared to Verilog and VHDL that would enable faster simulation earlier in the design flow and usher in the next generation of EDA tools based on transaction-level programming. In addition, the language was open source so a whole new level of innovation would become possible and enable start-ups to add value along with products from the major EDA companies.
When I first met Adnan Hamid, Breker’s CEO, his philosophical understanding of verification and its implications for electronics was as crystal clear then as it is now. He sees it as the enabler for greater innovation in chips and beyond, and takes it as his life’s mission. His passion was inspiring to me and I did not hesitate for a second when we decided to jointly start Breker. Throughout our journey, I have watched the market converge with what we are building at Breker, and have come to better appreciate my partner, the visionary man.
There is an important standard being worked on within Accellera and given its name, you might think that this is another incremental standard on a somewhat tired theme. It is called Portable Stimulus and yet it has almost nothing to do with stimulus and that stimulus, once generated by a tool not defined in the standard, is most certainly not portable. It is a fundamentally new approach to verification that could transform how chips and low-level software are verified. We will get back to the name in a moment, but the important thing is that users become informed about this new language and choose to have their voices heard in the standardization effort.
https://brekersystems.com/wp-content/uploads/2018/02/breker-logo4.png00Adnan Hamidhttps://brekersystems.com/wp-content/uploads/2018/02/breker-logo4.pngAdnan Hamid2016-09-29 00:00:012020-02-06 03:00:56The Next Wave in Verification
Portable Stimulus Gains Momentum
/by Adnan HamidNext month will see a significant milestone for Portable Stimulus. On September 15th the review period for the Early Adopter release of the Accellera Portable Stimulus Standard (PSS) will close and with it the opportunity to make your voice heard. This is an exciting time for Breker, the market leader in this space for the past decade, and signals a time when the industry can transition from a technology only available to a few aggressive adopters, to making it available to the mainstream.
Read more
Rewriting Revolutionary History
/by Adnan HamidThe semiconductor design industry has always preferred evolution over revolution. There have been a few successful revolutions but most of the time revolution happens over time through evolutionary steps.
Many people today would probably point to the migration to RTL from schematics as being revolutionary and they are probably right in hindsight. But revolution is not what really happened and it is not how Synopsys became the company that dominated the field of RTL synthesis.
Read more
Portable Stimulus – The First Verification Model
/by Adnan HamidWhen people think about design languages, they may not realize that the language is almost irrelevant. The language supports the underlying semantic model and it is this model that is important. EDA has defined design models at the gate level, the register transfer level (RTL) and various forms of behavioral levels. When we talk about RTL, we think about Verilog and VHDL, but they are only the languages that support that model, or very minor variations of it. But what about verification?
Read more
Total Value of a Standard
/by Adnan HamidThe creation of the Portable Stimulus standard has raised a number of issues about the tradeoffs between using an industry standard language and a domain-specific language. Several blogs have tried to make the case for one or the other and often use scare tactics to make one look better than the other. That is not the objective of this blog. Instead, it’s meant to provide some information as to why the inclusion of the C++ variant is a good thing for the industry.
Read more
Users Talk Back on Portable Stimulus
/by Adnan HamidAt the recent DVCon, I had the pleasure to moderate a panel that enabled users to talk about their experiences working with the Accellera standard’s body during the creation of the Portable Stimulus standard. I would like to thank Accellera for enabling such a panel and to Nanette Collins for organizing the panel and making sure that I had the easiest role in the ensuing discussion. I am sure that full write-ups of the panel will emerge, but I wanted to make the voice of the users heard.
Read more
Portable Stimulus Takes Center Stage At DVCon 2017
/by Maheen HamidWhen DVCon opens next week, attendees will hear plenty of talk about Portable Stimulus, a methodology and technology that’s grabbing industry attention and gaining momentum with the design verification community. In fact, I predict it will be the buzz of the conference this year.
Using a novel graph-based approach, Portable Stimulus is a standard means to specify verification intent and behaviors reusable across target platforms. Think of it as the GPS system for the verification flow –– Graph-based to ensure comprehensible complex scenarios, Portable, eliminating test redundancy across platforms, and Shareable to foster communication and reuse.
Read more
Constrain Me, Please
/by Adnan HamidIn the movies, when a person acts irrationally they are usually declared to be mad and quickly placed in a straitjacket for the protection of themselves and those around them. If we continue those thoughts into the world of verification, SystemVerilog must be declared to be a mad language.
Read more
EDA Hates C++. Wait, What – Back Up!
/by Adnan HamidWhy is Accellera supporting the use of an industry standard language in the development of the Portable Stimulus Standard?
Many of you remember the wave of anticipation when SystemC was created. A new language at a higher level of abstraction compared to Verilog and VHDL that would enable faster simulation earlier in the design flow and usher in the next generation of EDA tools based on transaction-level programming. In addition, the language was open source so a whole new level of innovation would become possible and enable start-ups to add value along with products from the major EDA companies.
Read more
The Genesis Of Portable Stimulus
/by Maheen HamidWhen I first met Adnan Hamid, Breker’s CEO, his philosophical understanding of verification and its implications for electronics was as crystal clear then as it is now. He sees it as the enabler for greater innovation in chips and beyond, and takes it as his life’s mission. His passion was inspiring to me and I did not hesitate for a second when we decided to jointly start Breker. Throughout our journey, I have watched the market converge with what we are building at Breker, and have come to better appreciate my partner, the visionary man.
Read more
The Next Wave in Verification
/by Adnan HamidThere is an important standard being worked on within Accellera and given its name, you might think that this is another incremental standard on a somewhat tired theme. It is called Portable Stimulus and yet it has almost nothing to do with stimulus and that stimulus, once generated by a tool not defined in the standard, is most certainly not portable. It is a fundamentally new approach to verification that could transform how chips and low-level software are verified. We will get back to the name in a moment, but the important thing is that users become informed about this new language and choose to have their voices heard in the standardization effort.
Read more