Breker Verification Systems Expands Integration With Synopsys Verification Solution

SAN JOSE, CA — May 25, 2016 — Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company, today announced that it has enhanced the integration of its portable stimulus products with the verification solution and flow from Synopsys, Inc.

The portable, self-checking test cases generated by Breker’s Trek™ family are verified in simulation testbenches using the industry-leading Synopsys VCS® Functional Verification Solution and VC Verification IP (VIP). Any design errors uncovered by these test cases are analyzed and diagnosed using the industry-leading Synopsys Verdi® Debug Solution and Verdi HW SW Debug. The latest integration provides deeper support for Synopsys VIP, enabling the Trek-generated test cases to improve coverage in a verification environment at the SoC level, and adds integration with Verdi Coverage and Verdi Protocol Analyzer.

“Breker has been a member of our In-Sync program for several years and was one of the first participants in our VC Apps Access Program,” said Janick Bergeron, Verification Fellow at Synopsys. “We are pleased to see Breker’s portable stimulus products working even more closely with our industry-leading, high-performance verification solution.”

For IP block-level verification, the Trek family automatically generates self-checking test cases compliant with the Universal Verification Methodology (UVM) from a graph-based scenario model. The integration with Verdi and Verdi Protocol Analyzer using the VC Apps API allows users to move seamlessly between Trek and Verdi GUIs. The integration with VC VIP enables protocol-aware debugging and performance analysis.

For SoC-level verification, the Trek family uses portable stimulus techniques to reuse verification knowledge from the IP blocks to the full SoC, generating C test cases to run on the embedded processors in simulation and acceleration. Breker’s TrekBox run-time component drives transactions to and from simulated and accelerated VC VIP. The integration with Verdi is extended to Verdi HW SW Debug so that users can view both hardware and software together to diagnose system-level functional or performance issues.

The Trek family also automatically generates test cases for in-circuit emulation, FGPA prototypes, and silicon in the bring-up lab. On all verification platforms, from simulation to silicon, TrekBox provides a GUI for verification engineers to visualize generated C code and test case maps. TrekBox also provides system-level scenario coverage metrics that are imported into Verdi Coverage and combined with other forms of coverage for a comprehensive view of verification progress.

“We have numerous customers using verification solutions from Synopsys and Breker together seamlessly,” commented Adnan Hamid, Breker’s chief executive officer (CEO). “Working with Synopsys to develop ever-deeper levels of integration offers greater productivity and ease of use for both IP and SoC developers.”

About Breker Verification Systems
Electronic Design Automation (EDA) software company Breker Verification Systems (www.brekersystems.com) provides innovative solutions to solve the challenge of complex system-on-chip (SoC) functional verification. Its Trek family of software and applications and its unique SoC scenario-modeling approach are used in production at leading semiconductor companies in the U.S., Europe and Asia. Founded in 2003, Breker is privately held and funded. Daily updates on company activities are available at twitter.com/BrekerSystems. Corporate headquarters: 1879 Lundy Ave., Suite 126, San Jose, Calif. 95131. Telephone: (650) 336-8872. Email: info@brekersystems.com. Website: www.brekersystems.com.

Trek, TrekUVM, TrekSoC, TrekSoC-Si, TrekApp, TrekBox and SoC Scenario Modeling are trademarks of Breker Verification System, Inc. Breker Verification Systems acknowledges trademarks or registered trademarks of other organizations for their respective products.