Developed with SiFive to Address RISC-V System Integration Validation; Generates High-Impact SoC Verification Test Suite with Minimal Manual Effort
SAN JOSE, CALIF. –– December 10, 2019 –– Breker Verification Systems, the leading provider of Test Suite Synthesis tools based on the Portable Stimulus Standard (PSS), today introduced its RISC-V TrekApp, a complete, automated test content generator for RISC-V system integration testing.
RISC-V TrekApp, the first solution to address the entire RISC-V system-on-chip (SoC) system integration problem, targets complex verification challenges and increases coverage by executing unpredictable corner-case scenarios without the need for manually developed test content. The TrekApp works with existing universal verification methodology (UVM) and SoC verification environments and does not require the user to learn the PSS language.
“RISC-V excels in enabling new and innovative designs, creating verification opportunities for system integration,” remarks Adnan Hamid, Breker’s president and chief executive officer. “Breker’s RISC-V TrekApp builds on our success with other processors to fully automate this intensive task while allowing for the distinctiveness created by RISC-V, saving hours of laborious test development while increasing coverage.”