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Nanette Collins
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Breker Verification Systems and Codasip Announce Co-operation to Drive Open, Commercial-Grade RISC-V SoC Verification Processes
Imperas Announces Partnership with Breker to Drive Rigorous Processor to System Level Verification for RISC-V
Breker Verification Systems Joins RISC-V International as a Strategic Member to Drive Cache Coherency and SoC Integration Verification Methodologies
Breker Verification Systems’ Maheen Hamid Named to 100 Most Influential Women in Silicon Valley List by Silicon Valley Business Journal
Breker Verification Systems Unleashes the SystemUVM Initiative to Empower UVM Engineering
Breker Verification Systems Forms Galactic Partner Program to Accelerate Portable Stimulus Standard Ecosystem
/by becbrekInaugural Consulting and Training Partners Include AEDVICES Consulting, Axiomise, Sunburst Design, T&VS, Willamette HDL
SAN JOSE, CALIF. –– May 2, 2018 –– Breker Verification Systems, the leading provider of Portable Stimulus, today announced formation of its Galactic™ Partner Program, naming five inaugural consulting and training companies to help accelerate the Portable Stimulus Standard Ecosystem.
The inaugural partners are AEDVICES Consulting, Axiomise, Sunburst Design, Test and Verification Solutions (T&VS) and Willamette HDL, all recognized verification experts who manage and support large chip design and verification projects. Under terms of the program, each will work to build the ecosystem around the upcoming Accellera Portable Stimulus Standard, a standard means of specifying verification intent and behaviors reusable across target platforms, using the Breker tool suite.
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Breker Verification Systems Names Jim Hogan to Board of Directors
/by becbrekPortable Stimulus Provider Next-Generation Chip Design Verification Company, Notes Hogan
SAN JOSE, Calif., April 05, 2018 — Breker Verification Systems, the leading provider of verification solutions based on Portable Stimulus, today appointed Jim Hogan, managing partner of Vista Ventures, LLC, to its board of directors.
In making the announcement, Adnan Hamid, Breker’s founder and chief executive officer, remarks: “Jim Hogan is a semiconductor industry treasure who can be counted on for his strategic advice and broad network of contacts. We welcome him into the Breker fold and will rely on his vast wisdom and experience.”
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DVCon Exhibits Feature Breker Verification Systems’ Portable Stimulus Solutions for UVM, SoC Verification Flows
/by becbrekDemos will Highlight Graph-Based, Portability, Shareability for GPS-Like Verification System; Technical Program Includes Presentations from Breker CEO Adnan Hamid
SAN JOSE, Calif., Feb. 21, 2018 —
WHO: Breker Verification Systems, the leading provider of Portable Stimulus
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Breker Verification Systems Appoints Dave Kelf to Newly Created Role of Chief Marketing Officer
/by becbrekResponsibilities Range from All Aspects of Marketing to Strategic Programs, Channel Management, Portable Stimulus Standardization
SAN JOSE, Calif., Jan. 25, 2018 — Breker Verification Systems, the leading provider of Portable Stimulus, today named Dave Kelf to the newly created role of chief marketing executive.
Kelf, who most recently served as of vice president of worldwide marketing solutions at formal verification provider OneSpin Solutions, is responsible for all aspects of Breker’s marketing activities, strategic programs and channel management. He reports to Adnan Hamid, Breker’s chief executive officer (CEO) and co-founder.
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Media Alert: Breker Verification Systems to Demonstrate Portable Stimulus at DVCon India
/by becbrekTutorial Introducing Portable Stimulus Standard includes Presentation from Breker’s Adnan Hamid
SAN JOSE, CA — Aug 31, 2017 —
WHO: Breker Verification Systems, the leading provider of Portable Stimulus
WHAT: Will demonstrate practical applications of its implementation of the Early Adopter release of the Portable Stimulus Specification from Accellera at DVCon India in Booth #404, including its use in UVM-based simulation environments and embedded software testing in emulation systems.
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Breker Verification Systems to Demonstrate Implementation Compliant with Accellera Portable Stimulus Draft Standard During DAC
/by becbrekWill Showcase its C++ Contribution to Standardization Effort, Displaying Practical Verification Proficiency
SAN JOSE, CA — June 15, 2017 — Breker Verification Systems, the leading provider of Portable Stimulus, will demonstrate its implementation compliant with the Early Adopter release of the Portable Stimulus Specification from Accellera at the Design Automation Conference (DAC) June 19-21 at the Austin Convention Center in Austin, Texas.
“Breker was doing Portable Stimulus before it had a name,” remarks Michael Hoyt, president of Paradigm Works and DVClub organizer. “Breker showed the semiconductor industry what could be done with a graph-based approach to chip design verification through an inspired vision and exceptional tools. The industry owes Adnan Hamid a debt of gratitude as Breker is helping simplify and streamline the verification process.”
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Media Alert: Breker Verification Systems to Demonstrate Portable Stimulus Tools at DVCon
/by becbrekWill Highlight Graph-Based, Portability, Shareability: for Verification GPS
SAN JOSE, CA — February 22, 2017
WHO: Portable Stimulus Leader Breker Verification Systems
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Media Alert: Breker Verification Systems to Speak on Portable Stimulus and Demonstrate Established Solution at DVCon India in Bangalore
/by becbrekSAN JOSE, CA — August 30, 2016 —
WHO: Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company
WHAT: Will exhibit in Booth 405 during the Design and Verification Conference and Exhibition (DVCon) India in Bangalore. Breker will demonstrate how its Trek family of products provides a robust, proven solution to the challenge of portable stimulus for SoC verification. Recently introduced features include a memory map viewer to aid in debug, a performance monitor to gather statistics from realistic test cases, and enhanced integration with the verification solution and flow from Synopsys, Inc. Breker’s products automatically generate multi-threaded, multiprocessor, self-verifying test cases to stress-test all features of the SoC, accelerating the chip development schedule while improving design quality. These test cases run in simulation, in-circuit emulation (ICE), FPGA prototypes, and actual silicon in the bring-up lab.
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Media Alert: Breker Verification Systems to Exhibit and Demonstrate Established Portable Stimulus Solution at DAC in Austin
/by becbrekSAN JOSE, CA — June 01, 2016 —
WHO: Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company
WHAT: Will exhibit in Booth 1626 during the Design Automation Conference (DAC) in Austin. Breker will demonstrate how new features in its Trek family of products provide a robust, proven solution to the challenge of portable stimulus for SoC verification. New features include a memory map viewer to aid in debug, a performance monitor to gather statistics from realistic test cases, and enhanced integration with the verification solution and flow from Synopsys, Inc. Breker’s products automatically generate multi-threaded, multiprocessor, self-verifying test cases to verify all features of the SoC, accelerating the chip development schedule while improving design quality. These test cases run in simulation, in-circuit emulation (ICE), FPGA prototypes, and actual silicon in the bring-up lab.
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Breker Verification Systems Expands Integration With Synopsys Verification Solution
/by becbrekSAN JOSE, CA — May 25, 2016 — Breker Verification Systems (www.brekersystems.com), The System-on-Chip (SoC) Verification Company, today announced that it has enhanced the integration of its portable stimulus products with the verification solution and flow from Synopsys, Inc.
The portable, self-checking test cases generated by Breker’s Trek™ family are verified in simulation testbenches using the industry-leading Synopsys VCS® Functional Verification Solution and VC Verification IP (VIP). Any design errors uncovered by these test cases are analyzed and diagnosed using the industry-leading Synopsys Verdi® Debug Solution and Verdi HW SW Debug. The latest integration provides deeper support for Synopsys VIP, enabling the Trek-generated test cases to improve coverage in a verification environment at the SoC level, and adds integration with Verdi Coverage and Verdi Protocol Analyzer.
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