Breker ARMv8 TrekApp
Automated stress testing of 1000s of common multi-core, multi-memory error conditions
Broad system cache coherency analysis with load/store variants
Easily extendable platform for I/O coherent agents and custom scenarios
ARM-based SoC Verification
ARM processors are a ubiquitous component within the vast majority of modern System on Chips (SoCs). The ARMv8 architecture is laden with valuable capability, which requires a degree of verification to ensure correct operation within the SoC.
The verification requirements for ARMv8-based platforms include a large number of tests that revolve around cache behavior, but it is also necessary to stress test memory access, check for correct interrupt operation and more. Many of these verification tasks require large numbers of test sequences, and the generation of these can be automated. This is the purpose of the Breker ARMv8 TrekApp.
ARMv8 TrekApp Overview
The ARMv8 TrekApp is specifically designed to stress test integrations of the ARMv8 architecture-based processors. Many complex test sets that are required for the comprehensive testing of ARMv8 integrations have been encapsulated in Portable Stimulus models, alleviating error prone test authoring and enabling the generation of powerful and all-inclusive test sets.
The TrekApp will automatically generate many thousands of tests that are specifically designed to exercise corner case and stress test the design. It may be configured for the specific ARMv8 installation and will synthesize a broad range of high-quality tests that would otherwise require many man months of effort to create.
ARMv8 TrekApp Operation
The ARMv8 TrekApp includes a range of preset graphs that are executed to synthesize tests for issues common to many ARMv8 installations. The graphs may be easily constrained and controlled by the user to provide testing for specific areas and scenarios, as well as to set the number and intensity of the tests.
This solution provides a very simple and easy to understand depiction of key scenarios that is used to synthesize many thousands of test vectors. These tests are designed to rigorously exercise a very large number of corner case operations using constrained random techniques. This enables a far more thorough and broad verification operation than can be sensibly achieved through manual test authoring.
The areas that are tested include:
- Cache State Transitions
- Cache Line Sharing Cases
- Snoop / Probe Sources
- Load/Store Operation Size
- Load/Store Sources
- False Sharing Cases
- Crossing Cache Line Boundaries
- Capacity Eviction Cases
- Multiple Memory Regions
- Memory Ordering Tests
- Concurrent Scenarios
For all tests, test stimulus, checkers and scoreboards, and coverage models are synthesized to provide a complete testbench.
A focus on cache operation and coherency is provided for cache architectures common to the ARMv8 architecture. For example cache state transitions that target interesting cache scenarios through the 5 states any cache line can have. The tests will follow the prescribed transitions to cover all possible state combinations. Cache line sharing and snoop/probe sources are also evaluated to ensure full coverage of all common operations. The efficiency of the ARMv8 TrekApp cache coherency tests compared with a production ready manual directed test may be observed below.
The App provides various mechanisms to stress test both the data and instruction memories operation, including parallel load/store operations from multi processors that fully exercises the memory address space. Poor memory allocation and weakly ordered memory scenarios are tested, including the use of the Dekker Algorithm for memory analysis.
Interrupt handling is also exercised using a range of random interrupts from different processes. All tests may be coupled with custom I/O activity and instruction manipulation to provide realistic tests for the particular application of the processor system under test.
The ARMv8 TrekApp makes use of the TrekSoC product analysis user interface to examine the various testing threads that are generated across the processors and I/O transactions, the memory map and the code running. Coverage results may be examined against the original tests, and the test progression may be analyzed to detect exact sources of bugs and other issues.
The ARMv8 TrekApp is a key solution for any ARM processor installation and will rigorously test the most complex ARM-based system quickly and efficiently, while significantly cutting down on manual test authoring effort.