Fully automated solutions requiring no test authoring, for complex, resource-intensive verification problems
Thousands of synthesized tests that target complex corner cases, which are hard to manually create
May be deployed at any point during verification flow with no knowledge required of portable stimulus
The Breker “Trek” suite and apps solve challenges across the functional verification process for large, complex semiconductors. This includes streamlining UVM-based testbenches for IP verification, synchronizing software and hardware tests for large system-on-chips (SoCs), and simplifying test sets for hardware emulation and post-fabricated silicon.
Breker has included a range of “Apps” that operate with the Trek Products to provide automated, push button solutions to specific common verification challenges.
- The ARMv8 TrekApp handles typical processor test issues and is focused primarily on the ARM device range.
- The Cache Coherency TrekApp verifies system-level coherency in a multiprocessor SoC.
- The Power Management TrekApp automates the verification of power domain reset states in a multi power domain device.
- The RISC-V TrekApp generates system integration tests for Open Architecture RISC-V processors.
- The Security TrekApp synthesizes test content to verify IC protected regions.
The Breker family of products and apps is proven in production at many leading semiconductor companies worldwide. As a leader in the development of the Accellera Portable Stimulus Standard (PSS), Breker has earned a reputation for dramatically reducing verification schedules in advanced development environments. The company’s solutions enable design managers and verification engineers to realize measurable productivity gains, speed coverage closure and easily reuse verification knowledge.