SoC Verification and the Synthesizable VerificationOS™ Workshop
Breker’s popular DVCon 2021 workshop featuring Mike Chin, Intel and Adnan Hamid, Breker
Breker’s popular DVCon U.S. 2021 workshop on SoC Verification that features the new Synthesizable VerificationOS is now generally available.
The 45-minute workshop commences with an interview with Intel Principal Engineer Mike Chin where he describes the SoC verification challenges he experiences and considers the concept of a Synthesizable VerificationOS. Adnan Hamid CEO/CTO at Breker then takes the audience through an explanation of how these challenges may be addressed based on Breker’s work with many verification teams. Adnan describes the three major enhancements that allows these teams to accelerate their development cycles while increasing quality and reducing effort:
- Generate reusable tests from a “Single Source of Truth” intent specification
- Maximize concurrent “3D-Coverage™” targeting SoC complexity
- Streamline test simplicity & portability with the Synthesizable VerificationOS
The recently announced Synthesizable VerificationOS is described in detail, as well as ways in which it may be used for test realization in UVM, SoC, and Post-Silicon environments across multiple execution platforms.
To download the slides from this popular workshop, please click here.
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