Test Suite Synthesis
Coverage-Driven Verification with Test Suite Synthesis
Video and White Paper
This 3 minute video introduces Test Suite Synthesis and shows a short demonstration.
Test content production for semiconductor verification is time consuming and leads to unpredictable coverage results and the potential for bugs. Synthesis accelerates and increases the quality of integrated circuit design flows. This paper discusses a similar approach for verification. Test Suite Synthesis dramatically improves ease and speed of test content production, while allowing for coverage-driven test generation, leading to controllable and predictable coverage closure across the verification process.
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